THESIS FOR THE DEGREE OF LICENTIATE OF ENGINEERING Controlled Switching of High Voltage SF6 Circuit Breakers for Fault Interruption

This thesis report describes an adaptive, self-checking algorithm for controlled short-circuit (fault) interruption in conjunction with high voltage alternating current SF6 circuitbreakers. The primary objective of controlled short-circuit interruption is to restrict the arcing time of the circuit-breaker to a nominal window (near the minimum arcing time) and thereby seek to reduce the electrical stress and wear on the interrupter. Different strategies for implementation of controlled fault interruption are described in terms of major constraints, such as avoiding undue prolongation of the total fault clearing time. Potential benefits to be gained from controlled fault interruption are described. The proposed algorithm uses an iterative, weighted, least mean square regression technique to estimate the phase angle (and time constant) of the fault current. These data are used to predict the future fault current behaviour, in particular estimation of future current zero times. The algorithm uses moving data sampling windows that are adjusted with each iteration to optimize the data processing. Novel measures included in the approach are the use of a truncated Taylor series approximation of the exponential fault current transient and a builtin hypothesis check function ("F0-test") of the estimated fault current model. The F0-test regulates both the data sampling window size and the status of the control algorithm. If the estimated fault current fails to provide a sufficiently consistent model with respect to the actual fault current, the synchronizing control scheme can be disabled so as not to unduly inhibit direct protection system operation. The F0-test has also been used to develop a method of fault initiation detection. The method has been tested for a range of simulated conditions, including different power frequencies, breaker opening and minimum arcing times, data sampling rates, protection operation times ranging from 1⁄4 to 1 cycle and inclusion of simulated white gaussian noise. In addition, simulations have been conducted using actual field recorded short-circuit data supplied by transmission utilities. The results obtained thus far have indicated that the proposed method can predict future current zeros within ± 1ms accuracy using relatively low data sampling rates (i.e. 2-4kHz), for protection times between 1⁄2-1 cycle and in the presence of white noise up to 20% magnitude. Average savings in the estimated arc current integral (single phase) of between 2040% have been found. Future research directions for the work are suggested.